Von Neumann any one?

hey,

Doing some thing about Von Neumann architecture, can any one explain the differnt parts of the block diagrame commmonly used with this subject?

i know about the fixed programme and then von neumann creating the computer with memory as such but i dont know the relation ship between the parts on the diagram.

[Vindaloo]

Whoa, this really is off the beaten track .

First of all, it's some time since I did this, so you'll have to forgive me if I'm talking complete bollards. I imagine that this is part of your education, though.

Not sure what I can say that a good book can't, but yeah, the big thing I was always taught about with the Von Neumann architecture is the three-stage cycle - Fetch, Decode, Execute. This is only possible in a (the) traditional architecture: the diagram you've shown.

With fixed programs, the 'computer' was always set up to exactly the same thing over and over again: create some data, punch it onto card, input it into the computer and turn the handle for the result. All of the operations were always performed in exactly the same order and could not be changed. The advantage of the Von Neumann model is that we can have a computer that operates in a different way depending upon what is loaded from the data itself (i.e. you can load your own programs). This enables it to function as a fully complete Turing machine and is the major advantage of this architecture (and probably why it's included in your syllabus).

So, back to the model: The data is stored in the memory unit (your top block, or in a modern computer, your 2GB sticks of RAM for the purposes of this diagram). This includes traditional data (numbers, graphics, etc.) as well as the code to execute itself (to do the for() loops, jump instructions, etc. stored in your .exe files these days).

The ALU (Arithmetic and Logic Unit) is a simple unit that knows only how to do very basic arithmetic and logic - compare, add, subtract, multiply etc.
numbers. This will typically write to CPU registers. Albeit, it tends to do this quite quickly these days.

Because the ALU is so dumb (albeit the bit that does millions of mathematical calculations per second before telling you that you've just been shot in the head by a sniper in a building two streets away and behind three trees. It's your own fault for playing COD against kids), it needs to know what calculations to perform, and when. This is where the Control Unit comes in. This stores the actual code itself and operates upon it. It'll do all your loops, 'goto' statements and (typically) memory writes back to main memory (before telling you you've been shot in the head ...)

Now, it might help to go back to the three parts I touched on before: 'Fetch - Decode - Execute'.

If you imagine a computer running a program, the first thing it needs to do is to know what to do. In this case, it means to Fetch data (for example, a list of additions with the associated numbers to be added) from the main memory.

This is typically fetched into the CU (Control Unit), which then decodes that instruction (perhaps what it's fetched the binary sequence for the number '12' ... which someone's decided that for this CPU means 'add') and some data to go with it (the two numbers to add). Part of this decoding phase means to set up the ALU with the given instruction and the specific numbers to add.

Then all we need to do is execute - allow the ALU itself to perform it's addition (potentially adding 1 kill to the teenage tw*t's kills score).

So Fetch gets the data, decode sets up the ALU with that data all ready to be 'crunched' and execute turns the handle on the ALU and out pops the result.

As a side-point, I don't like the diagram you've given (though I notice it's from wikimedia and not yours. Perhaps it's a typical one taught these days?) as it suggests the Accumulator (which is where the result of an ALU operation is stored) determines what to do with the data - send it to output or input. In a modern PC, it's more likely that it'll get sent back to some other form of memory (main memory, graphics RAM, sound RAM etc.) via a memory controller, likely in coordination with the Control Unit itself. I've attached a diagram I think more fitting of a modern PC (ignoring the many other important parts ... memory busses, CPU and Main memory cache, etc. Dunno if it'll be of any use, though.



Hope at least some of that helps , if only a little bit?

Adrian

Next week: optimising Bresenham's line algorithm for line and polygon rasterisation using active line linked lists and incremental deltas. With hidden line removal.

[keith_d]

I'd add, that in a Von Neumann architecture there is only one memory area for both instructions and data. Some neater designs separate data and program memory busses.

If you want it, I have a flash video thing that shows you exactly what goes where cycle by cycle for different operations. I passed processor course T224 only last year, so i should be able you find it.

Let me know.

[timwilky]

god do they still teach this stuff?

Well obviously they do, but it is state of the ark